Topic P5_STEPS from CPU FAQ base


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SU.HARDW.PC.CPU (2:5020/299) SU.HARDW.PC.CPU From : Tema Ershov 2:5000/7.33 Mon 16 Sep 96 08:22 Subj : Pentium FAQ [1/5] PENTIUM(r) PROCESSOR FREQUENTLY ASKED QUESTIONS URL: http://pentium.intel.com/procs/support/faqs/ppfaqx2.htm : 11--96 ------------------------------------------------------------ Q11: I would like to know what voltage range my Pentium(r) processor requires. How do I determine this? For newer Pentium processors, the voltage specification can be read directly from the package. If a processor package has this information, it will be on the bottom side following the s-spec marking. The notation will be a slash mark followed by ABC, such as SK110/ABC. Here is the decoding of ABC: A) S = standard voltage (3.135 to 3.6V) V = VRE voltage (3.4 to 3.6V) B) S = Part has standard timing specifications. M = Part has minimum valid MD timing specifications. C) S = Part has standard timing specifications U = Not tested for dual-processing operation, but only for uni-and multi-processing. If your processor does not have the voltage markings directly on the package (see above), use the s-spec number to determine this. The s-spec is a 3-digit number on the processor package which follows SX, SK, SU, SY, or SZ. Use the s-specs shown in the following table to find the voltage requirements for your part. BASIC 75-,90-,100-,133-,150-,166-, AND 200- MHZ PENTIUM(r) PROCESSOR IDENTIFICATION INFORMATION: See the corresponding Note at the end of the table for items listing a number in the "Notes" column. Type Model Mfg. Core/bus Notes Family Stepping Stepping MHz S-Spec Comments 0 5 2 1 B1 90/60 SX879 STD 0 5 2 1 B1 90/60 SX885 MD 0 5 2 1 B1 90/60 SX909 VR 2 5 2 1 B1 90/60 SX874 DP,STD 0 5 2 1 B1 100/66 SX886 MD 0 5 2 1 B1 100/66 SX910 VR,MD 0 5 2 2 B3 75/50 SX951 TCP Mobile 0 5 2 2 B3 90/60 SX923 STD 0 5 2 2 B3 90/60 SX922 VR 0 5 2 2 B3 90/60 SX921 MD 2 5 2 2 B3 90/60 SX942 DP,STD 2 5 2 2 B3 90/60 SX943 DP,VR 2 5 2 2 B3 90/60 SX944 DP,MD 0 5 2 2 B3 90/60 SZ951 5 STD 0 5 2 2 B3 100/66 SX960 VRE/MD 0 5 2 4 B5 75/50 SX975 TCP Mobile 0,2 5 2 4 B5 75/50 SX961 STD 0,2 5 2 4 B5 75/50 SZ977 5 STD 0,2 5 2 4 B5 90/60 SX957 STD 0,2 5 2 4 B5 90/60 SX958 VR 0,2 5 2 4 B5 90/60 SX959 MD 0,2 5 2 4 B5 90/60 SZ978 5 STD 0,2 5 2 4 B5 100/66 SX962 VRE/MD 0 5 2 5 C2 75/50 SK079 TCP Mobile 0,2 5 2 5 C2 75/50 SX969 STD 0,2 5 2 5 C2 75/50 SX998 MD 0,2 5 2 5 C2 75/50 SZ994 5 STD 0,2 5 2 5 C2 75/50 SU070 6 STD 0,2 5 2 5 C2 90/60 SX968 STD 0,2 5 2 5 C2 90/60 SZ995 5 STD 0,2 5 2 5 C2 90/60 SU031 6 STD 0,2 5 2 5 C2 100/50,66 SX970 VRE/MD 0,2 5 2 5 C2 100/50,66 SX963 STD 0,2 5 2 5 C2 100/50,66 SZ996 5 STD 0,2 5 2 5 C2 100/50,66 SU032 6 STD 0 5 2 5 C2 120/60 SK086 VRE/MD 0 5 2 5 C2 120/60 SX994 VRE/MD 0 5 2 5 C2 120/60 SU033 6 VRE/MD 0 5 2 5 C2 133/66 SK098 MD 0 5 2 5 mA1 75/50 SK089 2,4 VRT,TCP 0 5 2 5 mA1 75/50 SK091 2,4 VRT,SPGA 0 5 2 5 mA1 90/60 SK090 2,4 VRT,TCP 0 5 2 5 mA1 90/60 SK092 2,4 VRT,SPGA 0,2 5 2 B cB1 120/60 SK110 3,4 STD/no Kit 0,2 5 2 B cB1 133/66 SK106 3,4 STD/no Kit 0,2 5 2 B cB1 133/66 SK106J 3,4,7 STD/no Kit 0,2 5 2 B cB1 133/66 SK107 4 STD 0,2 5 2 B cB1 133/66 SU038 3,4,6 STD/no Kit 0 5 2 B mcB1 100/66 SY029 2,4 VRT,TCP 0 5 2 B mcB1 120/60 SK113 2,4 VRT,TCP 0 5 2 B mcB1 120/60 SK118 2,4,7 VRT,TCP 0 5 2 B mcB1 120/60 SX999 4 3.3V,SPGA 0,2 5 2 C cC0 133/66 SY022 3 STD/No Kit 0,2 5 2 C cC0 133/66 SY023 STD 0,2 5 2 C cC0 133/66 SU073 3,6 STD/No Kit 0,2 5 2 C cC0 150/60 SY015 STD 0,2 5 2 C cC0 150/60 SU071 6 STD 0,2 5 2 C cC0 166/66 SY016 3 VRE/no kit 0,2 5 2 C cC0 166/66 SY017 VRE 0,2 5 2 C cC0 166/66 SU072 3,6 VRE/no kit 0 5 2 C cC0 166/66 SY037 8,9 VRE,PPGA 0,2 5 2 C cC0 200/66 SY044 9 VRE,PPGA 0 5 2 C cC0 200/66 SY045 1,9 VRE,PPGA 0 5 7 0 mA4 75/50 SK119 2,4 VRT,TCP 0 5 7 0 mA4 75/50 SK122 2,4 VRT,SPGA 0 5 7 0 mA4 90/60 SK120 2,4 VRT,TCP 0 5 7 0 mA4 90/60 SK123 2,4 VRT,SPGA 0 5 7 0 mA4 100/66 SK121 2,4 VRT,TCP 0 5 7 0 mA4 100/66 SK124 2,4 VRT,SPGA 0 5 2 C mcC0 100/66 SY020 2 TCP,VRT 0 5 2 C mcC0 100/66 SY046 2 SPGA,3.1V 0 5 2 C mcC0 120/60 SY021 2 TCP,VRT 0 5 2 C mcC0 120/60 SY027 2 SPGA,3.1V 0 5 2 C mcC0 120/60 SY030 2 SPGA,3.3V 0 5 2 C mcC0 133/66 SY019 2 TCP,VRT 0 5 2 C mcC0 133/66 SY028 2 SPGA,3.1V 0 5 2 6 E0 75/50 SY009 TCP,Mobile 0,2 5 2 6 E0 75/50 SY005 STD 0,2 5 2 6 E0 75/50 SU097 5 STD 0,2 5 2 6 E0 75/50 SU098 6 STD 0,2 5 2 6 E0 90/60 SY006 STD 0,2 5 2 6 E0 100/66 SY007 STD 0,2 5 2 6 E0 100/66 SU110 5 STD 0,2 5 2 6 E0 100/66 SU099 6 STD 0,2 5 2 6 E0 120/60 SY033 STD 0,2 5 2 6 E0 120/60 SU100 6 STD NOTES: - Where values of Type, Family, Model and Stepping correspond to the following bits of EDX register after RESET and the same bits of the EAX register after the CPUID instruction is executed (this is shown as 2 different values based on the operation of the device as the primary processor or the dual processor upgrade): Value Bits Type [13:12] Family [11:8] Model [7:4] Stepping [3:0] - For a definition of STD, VR, VRE, MD, VRE/MD, see the answer to question #10 above or refer to Intel document 242480. - DP indicates that this part can only be used as a dual processor. CPU Type of "2" or "0 or 2" indicates this part supports dual processing. 1. TCASE = 60'C. 2. VRT Intel's Voltage Reduction Technology: The VCC for I/O is 3.3V, but the core VCC, accounting for about 90% of power usage, is reduced to 2.9V, to reduce power consumption and heating. 3. No Kit means that part meets the specifications but is not tested to support 82498/82493 and 82497/82492 cache timings 4. STEPPING The cB1 stepping is logically equivalent to the C2-step, but on a different manufacturing process. The mcB1 step is logically equivalent to the cB1 step (except it does not support DP, APIC or FRC). The mcB1, mA1, mA4 and mcC0-steps also use Intel's VRT (Voltage Reduction Technology, see note 2 above) and are available in the TCP and SPGA package, primarily to support mobile applications. All mobile steppings are distinguished by an additional "m" prefix, for "mobile". 5. This is a boxed Pentium processor without the attached fan heatsink. 6. This is a boxed Pentium processor with an attached fan heatsink. 7. These parts do not support boundary scan. S106J was previously marked (and is the same as) SK106J. 8. DP, FRC and APIC features are not supported on these parts. 9. These parts are packaged in the Plastic Pin Grid Array (PPGA) package. For additional specifications of this package, see Intel document 242480. For order information on document 242480, the Pentium(r) processor Specification Update, please see General Corporate FAQs, question #9. ------------------------------------------------------------

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