Topic K6BUG from CPU FAQ base
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From : Alex Grigoriev 2:5020/52 Fri 20 Jun 97 06:55
Subj : K6 bug
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From: "Alex Grigoriev"
Из официального документа AMD (revision guide):
2.3 Interrupts and Exceptions
2.3.1 Interruption of REP MOVS Instruction
Products Affected. B stepping
Normal Specified Operation. A move string instruction (MOVS) with a REP
prefix can be interrupted before
the start of its execution by the occurrence of a hardware interruptЗsuch
as NMI, INTR, STPCLK, or
SMI.
Non-conformance. If a REP MOVS instruction is interrupted after it is
decoded, but before the execution
of the first iteration of the instructionЗspecifically, during the initial
check for ECX equal to 0Зand
all of the conditions itemized below are true, then the incorrect address
size and/or operand segment
register is used for the one iteration of the REP MOVS instruction that is
executed before the interrupt
is recognized. Following is a list of the conditions that must apply to the
REP MOVS instruction for this
erratum to occur:
- An address size override prefix is used
- The initial loop count loaded in ECX equals 6
-The interrupt is received internally on exactly one specific clock just as
the processor is checking if
the initial loop count in ECX equals 0
- The next few instructionsЗbetween one and fourЗthat immediately follow
the REP MOVS
instruction reside in the processorВs instruction cache, and one of them is
a vector-decoded
instruction (the complex x86 instructions are typically vector decoded)
- The effective address size or operand segment register of the
vector-decoded instruction differs
from that of the REP MOVS instruction
- Certain other relative internal pipeline timing conditions must occur
Potential Effect on System. The effect on software is unpredictable.
Suggested Workaround. None.
Resolution Status. This erratum is corrected in a future stepping of the
AMD-K6 processor.
Степпинг - первая буква в строчке над "(m) (c) 1997 AMD"
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